Mixed-signal CMOS design Engineer

Job title:

Mixed-signal CMOS design Engineer

Company

Nokia

Job description

Job DescriptionNokia’s Network Infrastructure group is at the heart of a revolution to bring more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise.The Optics Subsystems group develops the frontends for coherent optical long-distance transmission modules to interconnect network nodes and data centers. We are expanding and looking for highly motivated and experienced engineers to join us to develop the next generations of transmission systems.Within Optics Subsystems, the SoC (System-on-Chip) team members architect, specify, design and test the ASICs for the optical modules. Our main goal is to extend the optical reach and transmission bandwidth and at the same time reduce the power and floorspace needs by using the latest chip technologies.Sounds interesting?
Be sure to check out details about our latest developments, the Photonic Service Engines:
https://www.nokia.com/networks/technologies/photonic-service-engines/Responsibilities

• Developing high-speed analogue IPs in deep sub-micron CMOS technologies.
• Depending on experience, taking responsibility for the whole IPs or large sections of them.
• Mentoring circuit and layout design engineers.
• Contributing to and co-designing complex state of the art electronic devices for Optical Communications.
• Supporting multiple cross-functional teams working on system design, optical, digital and DSP design,
• ASIC integration, package integration, module and product design.
• Testing and documenting own design work.

Qualifications

• Master’s degree or PhD in Electronic Engineering, Telecommunication Engineering.
• 10+ years of demonstrated experience in deep sub-micron analogue CMOS design (
• Experience in high speed analogue CMOS design (>15GHz).
• Experience in verifying and bringing up complex analogue IPs and test devices.
• Very good understanding of technology constraints and layout parasitics.
• Basic RFIC experience (EM extraction, impedance matching, narrow-band design techniques).
• Mixed-signal design, along with Verilog-A, AMS, System Verilog functional modeling skills.
• Matlab (or similar) modeling skills for performance modeling and test automation.
• Analytical thinking.
• Ability to work in a multi-site international team.
• Effective communication.
• English (mandatory) .

About UsCome create the technology that helps the world act together
Nokia is committed to innovation and technology leadership across mobile, fixed and cloud networks. Your career here will have a positive impact on people’s lives and will help us build the capabilities needed for a more productive, sustainable, and inclusive world.
We challenge ourselves to create an inclusive way of working where we are open to new ideas, empowered to take risks and fearless to bring our authentic selves to workWhat we offer
Nokia offers continuous learning opportunities, well-being programs to support you mentally and physically, opportunities to join and get supported by employee resource groups, mentoring programs and highly diverse teams with an inclusive culture where people thrive and are empowered.Nokia is committed to inclusion and is an equal opportunity employer
Nokia has received the following recognitions for its commitment to inclusion & equality:

• One of the World’s Most Ethical Companies by Ethisphere
• Gender-Equality Index by Bloomberg
• Workplace Pride Global Benchmark

At Nokia, we act inclusively and respect the uniqueness of people. Nokia’s employment decisions are made regardless of race, color, national or ethnic origin, religion, gender, sexual orientation, gender identity or expression, age, marital status, disability, protected veteran status or other characteristics protected by law.
We are committed to a culture of inclusion built upon our core value of respect.Join us and be part of a company where you will feel included and empowered to succeed.

Expected salary

Location

Cambridge

Job date

Thu, 14 Nov 2024 23:59:37 GMT

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